1. Field of the Invention
This invention relates generally to monolithic integrated circuits and more particularly to a charge pump circuit for biasing the substrate of an integrated circuit.
2. Description of the Prior Art
Integrated circuits including a substrate within which a plurality of bipolar transistors are fabricated are well known in the art. Typically the substrate is a P-type semiconductor material having an upper surface upon which an N-type epitaxial semiconductor layer is deposited. Typically, individual epitaxial islands are isolated from one another by diffusing a P-type dopant through an appropriate mask into the upper surface of the epitaxial layer. The P-type dopant diffuses through the epitaxial layer and contacts the underlying P-type substrate. Circuit components, such as transistors and resistors are typically fabricated within one or more of the isolated epitaxial islands. In order to prevent electrical coupling between one epitaxial island and another, the P-type substrate material is usually biased with the most negative circuit voltage such that the epitaxial-substrate semiconductor junction is maintained in reverse bias. For example, if the circuit includes power supply conductors for receiving voltages of +5 volts and 0 volts, the substrate is typically biased with 0 volts. The reverse biased epitaxial-substrate semiconductor junction forms a depletion region capacitance, also known as a space-charge or barrier capacitance. The thickness of the space-charge layer at the junction increases with reverse voltage. For a more detailed description of this phenomenon, see "Fundamentals of Semiconductor Devices" by Lindmayer and Wrigley, Van Nostrand, Reinhold Co., 1965.
In many bipolar circuit families, such as transistor-transistor logic (TTL) and emitter-coupled logic (ECL), an isolated epitaxial region may form the collector of a bipolar switching transistor, and the collector voltage varies as the transistor is switched between its ON and OFF states. The depletion capacitance associated with the epitaxial-substrate junction limits the speed of voltage transitions at the collector of each switching transistor, thereby limiting the overall bandwidth of a digital circuit.
Increasing the amount of reverse bias across the epitaxial-substrate junction decreases the amount of depletion capacitance associated with the junction. One method of increasing the amount of reverse bias across the epitaxial-substrate junction is to couple a third power supply terminal to the integrated circuit for applying a more negative potential to the P-type substrate. However, this technique has the disadvantage of requiring an extra power supply and an extra input terminal.
MOSFET integrated circuits are known which employ circuitry for biasing the substrate to a more negative potential without the use of a separate external power supply. However, for integrated circuits which employ bipolar transistors, it is necessary to carefully regulate the substrate bias voltage since too negative a substrate bias voltage will cause excessive leakage or even breakdown across the epitaxial-substrate junction. Thus, the substrate bias voltage must be regulated so as to strike an optimum balance between improved speed (associated with lesser collector-substrate capacitance for switching transistors) and increased leakage (associated with a larger reverse bias and the likelihood of defects in the semiconductor material). Also, negative going noise spikes must be prevented from being coupled to the substrate; therefore, the circuit for regulating the substrate voltage should have the ability to clamp the substrate voltage from becoming too negative.
Prior art MOSFET circuits are known which employ a source-body effect variation in the threshold of one or more MOSFET devices to sense the substrate bias voltage. However, the threshold voltage of a MOSFET device varies widely with processing variations and would be poorly suited for regulating the substrate bias voltage of a bipolar integrated circuit in which leakages can significantly harm circuit performance. In order for the substrate bias circuitry to respond quickly, this circuitry should be designed to be potentially capable of charging the substrate to a Thevenin equivalent voltage which is well below the desired bias voltage. The regulation of the actual bias voltage must therefore be closely controlled to prevent the charging circuitry from actually reaching the Thevenin equivalent voltage and biasing the substrate at too negative a voltage. Thus, it will be appreciated that a circuit which increases the amount of reverse bias across the epitaxial-substrate junction for decreasing the associated depletion capacitance and improving the speed-power product of a bipolar integrated circuit while preventing the magnitude of the substrate bias voltage from becoming so large as to degrade circuit performance is a significant improvement over prior art bipolar integrated circuits.